1. Technical Field
The present invention is directed to a current reference. Still more specifically, the present invention is directed to a low voltage CMOS current reference that is digitally tunable and that provides a high power supply rejection ratio (PSRR).
2. Description of Related Art
Technology improvements in semiconductor processing have led to a substantial increase in the number of transistors fabricated on a single integrated circuit. Along with an increase in the number of transistors also comes an increase in the amount of power dissipated by the integrated circuit. In an effort to reduce power dissipation (or power consumption), designers have reduced the voltage level of the power supplies in such integrated circuits. Currently for 65 nm and beyond the CMOS Vdd rail is reaching an asymptote of 1.2-0.8V.
Some circuit applications require a current reference that has a good power supply rejection ratio (PSRR), that is small in area, and capable of supplying large currents. Many of the current implementations use diodes, which in typical digital CMOS processes can only operate on the order of 20 microamps. These diodes have a large voltage drop on the order of 0.7 to 0.8V. This limits the voltage scaling and a special higher voltage rail would be required on an ASIC or processor.
Therefore, a need exists for a digitally tunable, high current, CMOS current reference with reduced sensitivity to power supply voltage fluctuations that can operate at current generation CMOS power supply levels.